A typical semiconductor die includes external connection points termed "bonding pads" that connect to integrated circuits formed on the die. The bonding pads are used to provide electrical connections between the integrated circuits formed on the die and the outside world. The bonding pads also provide sites for electrical testing. During a wire bonding process some of the bonding pads formed on the face of the die are connected to thin bonding wires which connect to the lead fingers of a leadframe. The bonding wires are the electrical bridge between the bonding pads and the package lead system. Following encapsulation and a trim and form operation, the lead fingers become the external leads of a completed semiconductor package.
FIG. 1 shows a typical packaging arrangement for a semiconductor die 10. Prior to a wire bonding process, the semiconductor die 10 is attached to a die mounting paddle 12 of a leadframe 14 using an adhesive or tape. During the wire bonding process, bonding pads 18 formed on the face of the die 10 are electrically attached to lead fingers 16 of the leadframe 14 using thin bonding wires 20. A wire bonding apparatus bonds the bonding wires 20 to the bonding pads 18 and to the lead fingers 16. This is typically accomplished using heat and pressure. Ultrasound and various other thermal bonding systems are also sometimes employed.
Following wire bonding, the leadframe 14, and die 10, are encapsulated in a plastic or ceramic material. The lead fingers 16 are then trimmed to form the completed semiconductor package or IC (integrated circuit). ICs come in a variety of configurations such as dynamic random access memories (DRAMs), static random access memories (SRAMs) and read only memories (ROMSs).
In addition to wire bonding, other technologies exist, in which bonding pads on a semiconductor die are used for electrically connecting the die to a leadframe or equivalent packaging component. Another technique known as TAB bonding uses bonding pads that are formed with a "bump" of material for attachment to a flexible strip of tape containing printed circuit traces.
In most cases, prior art wire bonding processes are relatively complicated because each bonding pad on the die must be attached to an external lead utilizing some permanent or semi-permanent bonding technique. One problem that exists with the various bonding technologies is that the bonding pads provide only a small surface area for effecting the bond. Inaccuracies in locating this small surface area and making the bond often cause the packaged semiconductor die to be rejected.
As an example, a bonding pad for a wire bonding arrangement is typically formed as a rectangle or square, having an area of less than 10.sup.4 .mu.m.sup.2 (e.g., 10.sup.2 .mu.m on a side). An automated wire bonding tool must precisely locate each bonding pad and a corresponding lead finger before making a bond. This is a difficult process and requires expensive and complicated equipment.
Wire bonding and other subsequent process steps are further complicated because most prior art bonding pads are embedded in a passivation layer so that the face of the die is non-planar. FIG. 2 is a cross section of a bonding pad 18 attached to a bonding wire 20. The bonding pad 18 is formed of a conductive metal such as A1 and is connected to integrated circuit formed on the die 10 typically with interlevel conducting traces (not shown). A barrier layer 22 and a polysilicon layer 24 separate the bonding pad 18 from an oxide layer 28 of a silicon substrate 29 wherein the active semiconductor devices are formed. A passivation layer 26 formed of a dielectric material or as a sandwich of different materials (e.g., oxide/nitride sandwich) covers the oxide layer 28. The bonding pad 18 is embedded in the passivation layer 26 The bonding pad 18 embedded in the passivation layer 26 forms a tub-like structure. The surface, or face, of the die 10 thus has a non-planar topography.
The non-planar topography provided by the bonding pads and passivation layer sometimes makes control of critical dimensions difficult. This tends to complicate the wire bonding process and subsequent packaging steps. As semiconductor devices have become more complex, problems caused by a lack of planarity tend to increase.
In addition, the location of the bonding pads 18 on the die is sometimes complicated by the leadframe 14 and integrated circuit configurations for the die 10. In some cases the bonding pads 18 are located along the peripheral edges of the die 10. In other cases the bonding pads 18 are inset from the edges of the die. Accordingly the leadframe 14 must be formed with lead fingers 16 having a configuration that corresponds to the spacing and location of the bonding pads 18 and that also permits the bonding wires 20 to be situated at a safe distance from neighboring wires. This not only complicates the configuration of the leadframe 14 and lead fingers 16 but also dictates a specific leadframe configuration for each type of die.
In addition to requiring complex lead finger configurations, most prior art bonding pads are located on the horizontal face of the die. This makes any packaging arrangement, other than a single packaged die, difficult to accomplish. In some applications it would be desirable to have the bonding pads terminate on the edge of a die. This would permit multiple dice to be stacked vertically on edge and connected to a horizontal supporting substrate or motherdie. U.S. Pat. No. 5,146,308 to Chance et al, which is commonly assigned with the present application, describes a method for forming bonding pads on the edge of a die that permits such a stacked arragement.
In view of these and other shortcomings associated with prior art processes for wire bonding and packaging semiconductor dice, it is an object of the present invention to provide a method for forming patterned metal connectors, of any metal, to the bonding pads of a semiconductor die. It is a further object of the present invention to provide a method for forming metal connectors for bonding pads in a pattern that can be customized to match different bonding pad and lead finger configurations and that provides a completely planar surface. It is yet another object of the present invention to provide a method for forming custom metal connectors for bonding pads that is simple, low cost and adaptable to large scale semiconductor manufacture.